- Micro-architecture definition and RTL development
- Low-power and performance-driven design techniques
- Protocols: AMBA AXI, AHB, APB, ACE, CHI, ATB, NVME, PCIE-CXL, NVLink, DDR
- Design optimization for timing, power, and scalability
RTL Design/SOC Integration
Design of scalable, high-performance digital systems with emphasis on micro-architecture and system efficiency.
- RTL + synthesis-ready constraints (as applicable)
- Design specification and micro-architecture notes
- Integration checklist and hand-off artifacts
- Review/closure reports
- New IP development
- Subsystem design and integration
- PPA optimization / refactor
- Design quality improvements